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《集成电路版图基础(英文影印版) 》
集成电路版图基础(英文影印版)
编号: PT481440
作者:Christopher Saint,Judy Saint
译者:
开本:
ISBN:730208356
出版社:清华大学出版社
出版日期:2004-04-01
装帧:
书夫曼编号:970774
原价: 45
普通会员:42.08  一星会员:40.82
二星会员:39.98  三星会员:39.13

内容简介
  随着芯片的新应用——移动电话、个人数字助理、以及消费电子——电子半导体的应用范围大大拓展。同时,对精于CMOS和双极型版图设计的技术人员空前需求。在《集成电路版图基础》一书中,作者ChristopherSaint整理了他在IBM培训教程中大获成功的顶尖素材,为您提供了一本必备的版图设计初级读本,内容包括:◆集成电路工艺◆版图设计技巧◆基础器件概念◆晶片工艺

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目录
Introduction xiii
Chapter 1 Basic Circuit Theory
Chapter Preview 1
Opening Thoughts for the Reader 1
Basic Circuit Review 2
Opposites Attract--Likes Repel 3
Units ora Basic Schematic 3
Series Formulas 4
Parallel Formulas 4
Ohm''''''''s Law 5
Kirchhoff''''''''s Laws 6
Circuit Diagram Symbols 8
Conductors, Insulators and Semiconductors
Semiconductor Material 11
N Type Material 12
P Type Material 13
PN Junction 14
The Potential Barrier 15
Controlling Flow across the Barrier 16
Diode 19
Diode Applications 19
Semiconductor Switches 21
Lighting a Bulb 21
The Field Effect 22
Making an FET 24
Isolating Our Switches 25
Enhanced versus Depletion 27
Complementary Switches 30
N Well and Substrate Contacts 30
Building Logic Circuits 31
Using Voltage as a Logic State 31
CMOS Logic Circuits 32
NAND Gate 36
NOR Gate 37
Closure on Basic Circuit Theory 37
Here''''''''s What We''''''''ve Learned 39
Application to Try on Your Own 39
Chapter 2 wafer Processing
Chapter Preview 45
Opening Thoughts on Wafer Processing 45
IC Layout 46
The Versatile Rectangle 47
Making a Wafer Base 49
Changing Layer Composition 52
Implantation 52
Diffusion 53
Adding a Layer 54
Epitaxial Deposition 55
Chemical Vapor Deposition 55
Oxide Growth 57
Sputtering 57
Evaporation 58
Removing a Layer 58
Photolithography 59
Building a Chip 61
Creating a Hole 61
Creating a Block 63
Planarization 65
Silicon Dioxide as a Mask 65
Self-Aligned Gates 66
Closure on Wafer Processing 69
Here''''''''s What We''''''''ve Learned 71
Chapter 3 CMOS Layout
Chapter Preview 10l
Opening Thoughts on CMOS Layout 101
Device Sizing 102
SPICE 102
Splitting Long Devices I06
Source-Drain Sharing 111
Device Connection Technique 115
Compact Layout 119
Stick Diagrams 120
Well and Substrate Ties 126
Well Tie Schemes 129
The Antenna Effect 131
Wiring with Poly 134
Diagram Relationships 136
Closure on CMOS Layout 137
Here''''''''s What We''''''''ve Learned 137
Applications to Try on Your Own 138
Chapter 4
Resistance
Chapter Preview 143
Opening Thoughts on Resistance 143
Introduction to Resistance 144
Measuring Resistance 145
Width and Length 145
Concept of Squares 146
Ohms-per-Square Values 150
Deriving the Resistor Formula Using a Poly Resistor 155
Basic Resistor Layout 155
Contact Resistance 158
Changing Body Material 169
Real World Resistor Analysis 173
Delta Effects on the Contacts 173
Delta Effects on the Body 173
Delta Effects on the Head 174
Spreading Resistance 176
The Big, Oh-My-Gosh, Total Resistance Equation 180
Practical Minimum Resistor Size 181
Extreme Options for Resistors 182
High Resistance--Low Precision 182
Low Resistance--High Precision 185
Checking Current Densities Makes You a Superhero 185
Making Your Layout Tolerance-Proof 190
Effects on Resistor Tolerance 190
What to Do about Tolerances 190
Using Existing Materials--Versatility at No Cost 192
Diffusion versus Poly 195
Double Poly 196
Bipolar/BiCMOS 196
Closure on Resistance 196
Here''''''''s What We''''''''ve Learned 196
Application to Try on Your Own 197
Chapter 5
Capacitance
Chapter Preview 205
Opening Thoughts on Capacitance 205
Capacitor Review 206
Capacitor Properties 207
Calculating Capacitance 210
Area Capacitance 210
Periphery Capacitance 212
N Well Capacitors 214
Parasitic Capacitance 216
Metal Capacitors 217
Stacked Metal Capacitors 218
Nitride Capacitors 218
Closure on Capacitance 219
Here''''''''s What We''''''''ve Learned 219
Chapter 6
Bipolar Transistors
Chapter Preview 221
Opening Thoughts on Bipolar Transistors 221
Theory of Operation 222
Similarity to FET 222
How an NPN Works 224
Vertical Processing 227
Switch Area Comparison: FET vs. NPN 227
Construction of Layers 228
Parasitics of NPN 231
PNP Transistors 232
Lateral PNP 232
Career Transitioning from CMOS Layout 234
Number of Rules 234
Black Box Placement 236
Closure on Bipolar Transistors 236
Here''''''''s What We''''''''ve Learned 237
Chapter 7
Dlodes
Chapter Preview 239
Opening Thoughts on Diodes 239
Types of Diodes 240
Regular Diode 240
Bipolar Transistor Diode 241
Faractor Diode 244
ESD Protection 244
Special Layout Considerations 249
Circular Layout 249
Multi-Finger Diode 250
Closure on Diodes 250
Hem''''''''s What We''''''''ve Learned 251
Chapter 8
Inductance
Chapter Preview 253
Opening Thoughts on Inductance 253
Basic Inductance 254
Transmission Lines 256
Straight Segment Characterization 256
Corner Characterization 257
Spiral Inductors 259
Inductor Quality 260
Stacked lnductors 261
RF Choke 263
Proximity Effect 265
Closure on Inductance 266
Here''''''''s What We''''''''ve Learned 267
Glossary 269
Suggested Readings and Resources 285
Educational Programs 287
Index 289


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